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Course Details

Intro VLSI Design

Code EE3301
Type Lab
Credits 2
Semester Sem 5
Segments 14
Time Slot C
Classroom A-LH-1
Instructor Dr. Kapil Jainwal
Course Page

Contents

Design abstraction levels; MOSFET device SPICE model; transistor scaling, design rules; timing and power considerations in design; CMOS Inverter - Static and dynamic response, threshold, noise margin; propagation delay, parasitic capacitance estimation; static and dynamic power consumption; SPICE analysis; inverter layout; Combinatorial logic design in CMOS; Ratioed logic; Pass transistor logic; Introduction to Dynamic CMOS design; Design and implementation of a simple ALU

References

1. Rabaey, Chandrakasan and Nikolic, Digital Integrated Circuits - A Design Perspective,
2nd Edition (2002)

2. Weste and Harris, CMOS VLSI Design - A Circuits and System Perspective, 4th Edition
(2011)